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SPARC64 VII : ウィキペディア英語版
SPARC64 VI

The SPARC64 VI, code-named Olympus-C, is a microprocessor, developed by Fujitsu. It implements the SPARC V9 instruction set architecture (ISA) and is compliant with the Joint Programming Specification (JSP1) developed by Fujitsu and Sun. It is used by Fujitsu and Sun Microsystems in their SPARC Enterprise M-class servers. The SPARC64 VI was succeeded by the SPARC64 VII (previously called the SPARC64 VI+)〔"SPARC's Still Going Strong", p. 1.〕 in July 2008.
== Description ==
The microprocessor has two cores. Each core is a modified SPARC64 V+ microprocessor. The process shrink enabled both cores and a secondary cache to be contained on a die.
The SPARC64 VI implements multithreading using two techniques, chip multiprocessing (CMP) and coarse-grained multi-threading which Fujitsu calls vertical multi-threading (VMT). The two cores both execute one thread each simultaneously, implementing CMP. Each core executes two threads, but only one of the two concurrent threads is executed at any given time. Which thread is executed is determined by time sharing or if the thread is executing a long latency operation, prompting the pipeline switches to another thread.〔Fujitsu Limited (27 March 2007). "''SPARC64 VI Extensions'', Release 1.3". pp. 45–46.〕 Multithreading required duplication of the integer registers, floating-point registers, control registers and program counters so there is one set of each for every thread.
As the SPARC64 VI is a dual-core microprocessor, bandwidth had to be increased if the extra core is to contribute to performance significantly. The cores share a 6 MB on-die unified L2 cache. The L2 cache is 12-way set associative and has a 256-byte line size. The cache is accessed by two unidirectional buses. The read bus, which delivers data to the cores, is 256-bit wide; and the write bus is 128-bit wide. It also uses a new system bus, the Jupiter Bus.
The SPARC64 VI is the first SPARC microprocessor implementing a fused multiply–add (FMA), while the corresponding instructions performed separate multiplication and addition operations in previous versions.〔("SPARC64 VI Extensions" ) page 56, Fujitsu Limited, Release 1.3, 27 March 2007〕

抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)
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